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sanyo electric co.,ltd. semiconductor company tokyo office tokyo bldg., 1-10, 1 chome, ueno, taito-ku, tokyo, 110-8534 japan ordering number : enn7812 52504tn (ot) no.7812-1/14 overview the LV8223T is a system driver ic that can implement, with a single chip, all the motor driver circuits required in cd and md drives. the LV8223T provides three-phase pwm spindle, three-phase sled, focus, and tracking drivers. since it integrates lifting drivers (three pwm h bridge channels) and one half-bridge channel on the same chip, it can contribute to further miniaturization, thinner form factors, and lower power in end products. the spindle motor driver adopts a direct pwm sensorless drive technique for highly efficient motor drive requiring a minimal number of external components. functions ? pwm h bridge motor drivers (3 channels) ? three-phase stepping motor driver ? half-bridge driver ? direct pwm sensorless motor driver sanyo semiconductors data sheet LV8223T bi-cdmos ic motor driver system in cd and md players any and all sanyo products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. consult with your sanyo representative nearest you before using any sanyo products described or contained herein in such applications. sanyo assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo products described or contained herein. specifications absolute maximum ratings at ta = 25c parameter symbol conditions ratings unit supply voltage v cc max 5.0 v output block supply voltage vs max 4.5 v predriver voltage (gate voltage) vg max 6.5 v output current i o max 0.7 a allowable power dissipation 1 pd max1 independent ic 0.45 w allowable power dissipation 2 pd max2 mounted on a 50 50 1.6 mm glass epoxy 1.25 w pcb (reference value) operating temperature topr C20 to +85 c storage temperature tstg C55 to +150 c recommended operating conditions at ta = 25c parameter symbol conditions ratings unit supply voltage v cc 2.1 to 4.0 v output block supply voltage vs 0 to vg C 3.0 < v cc v predriver voltage (gate voltage) vg vs + 3 to 6.4 v
no.7812- 2 /14 l v8223t electrical characteristics at ta = 25 c, v cc = 2.4 v parameter symbol conditions ratings unit test circuit min typ max diagram current drain 1 i cc 1 s/s pin: high (operating mode) 1.5 2.0 ma 1 current drain 2 i cc 2 s/s pin: low (standby mode) 20 a 2 [charge pump output] output voltage vg 5.6 6.1 6.4 v 1 actuator block (focus, tracking, head up/down, and half bridge actuator drivers) [actuator input pins] high-level input voltage range v aih v cc C 0.5 v cc v 3 low-level input voltage range v ail 0 0.5 v 3 [output block] output on-resistance ron1, 2, 3 i o = 0.5 a, sum of the high and 0.8 1.2 4 low sides output transmission delay time (h bridge) t rise design target value * 0.05 s * t fall design target value * 0.05 s * with the channel 1 and channel 2 minimum input pulse width tmin pulse widths 3 2/3 tmin 100 ns * design target value * [mute pin] high-level input voltage range vmuh mute off v cc C 0.5 v cc v 5 low-level input voltage range vmul mute on 0 0.5 v 5 three-phase stepping motor block [logic input pins] high-level input voltage range vsl ih v cc C 0.5 v cc v 3 low-level input voltage range vsl il 0 0.5 v 3 [phase detector comparator block] input offset voltage v slofs C9 +9 mv 6 common-mode input voltage range v slcm 0 v cc v 7 high-level output voltage v slch i o = C0.5 ma v cc C 0.5 v cc v 8 low-level output voltage v slcl i o = 0.5 ma 0.5 v 8 [output block] output on-resistance ronsl i o = 0.5 a, sum of the high and 0.8 1.2 9 low sides spindle motor driver block [output block on-resistance] source1 ron (h1) i o = 0.5 a, vs = 1.2 v, vg = 6 v 0.4 0.6 10 forward drive transistor source2 ron (h2) i o = 0.5 a, vs = 1.2 v, vg = 6 v 0.4 0.6 10 reverse drive transistor sink ron (l) i o = 0.5 a, vs = 1.2 v, vg = 6 v 0.4 0.6 10 source + sink ron (h+l) i o = 0.5 a, vs = 1.2 v, vg = 6 v 0.8 1.2 10 [position detector comparator] input offset voltage v sofs design target value C9 +9 mv * [vco pin] vco high-level voltage v coh 0.65 0.80 0.90 v 11 vco low-level voltage v col 0.35 0.50 0.60 v 11 [s/s pin] high-level input voltage range v ssh start v cc C 0.5 v cc v 5 low-level input voltage range v ssl stop 0 0.5 v 5 [break pin] high-level input voltage range v brh brake off v cc C 0.5 v cc v 12 low-level input voltage range v brl brake on 0 0.5 v 12 [pwm pin] high-level input voltage range v pwmh v cc C 0.5 v cc v 12 low-level input voltage range v pwml 0 0.5 v 12 pwm input frequency v pwmin 190 khz 13 [clk pin] high-level input voltage range v clkh v cc C 0.5 v cc v 14 low-level input voltage range v clkl 0 0.5 v 14 [fg output pin] high-level output voltage v fgh i o = C0.5 ma v cc C 0.5 v cc v 8 low-level output voltage v fgl i o = 0.5 ma 0 0.5 v 8 * : design target value parameters are not tested.
no.7812- 3 /14 l v8223t 7.0 9.0 7.0 9.0 0.125 0.5 0.16 0.4 (0.5) (1.0) 1.2max 0.1 1 16 33 48 17 64 32 49 0 20 20 40 60 100 80 0.65 0.23 0.45 1.25 0 1.5 1.0 0.5 ambient temperature, ta c allowable power dissipation, pdmax w il v00176 pd max t a pcb mounted independent ic pcb: 50 50 1.6 mm glass epoxy pcb package dimensions unit : mm 3289 tqfp64j (7 7) mute in1, 2f in1, 2r out1, 2f out1, 2r h l l l l h h l h l h l h l h h h h l l l z z mute2 in3f in3r out3f out3r h l l l l h h l h l h l h l h h h h l l l z z mute3 in4 out4 h l l h h h l z focus, tracking, and head up/down driver blocks mute s1 s2 s3 suo svo swo h l l l h l z h h l l h z l h l h l z h l h h h l l h z h l l h l z h h h l h z l h h l h h z z z h h h h z z z l z z z sled stepping motor driver block z: open actuator truth tables
no.7812- 4 /14 l v8223t pin assignment 53 54 57 56 58 62 64 63 61 60 59 55 52 51 50 49 vg 4 9 10 11 12 6 7 8 5 2 3 13 14 15 16 1 20 17 18 19 21 22 23 24 25 26 27 28 29 30 31 32 43 42 44 33 35 34 36 38 37 39 41 40 45 46 47 48 in3r LV8223T spvs fil sgnd sgnd vco rmax vcoin mode1 s/s mute3 in4 brk clk pwm top view in3f vs3 out3f out3r pgnd3 pgnd2 out2r out2f vs2 pgnd1 out1r out1f vs1 in1r in1f in2r in2f mute mute2 cp1 cp2 cpc1 cpc2 spgnd v cc v cc s1 s2 s3 slvs fg slgnd suco suo svo svco swco swo out4 vs4 pgnd4 scom wout vout com uout tgnd comin
no.7812- 5 /14 l v8223t pin function pin no. pin name pin description equivalent circuit 1 spgnd spindle output block ground 2 spvs spindle motor driver power supply. insert a capacitor between this pin and ground. 63 61 60 uout vout wout outputs. connect these pins to the spindle motor coils. 62 com spindle motor common point connection 3 fil spindle motor position detector comparator filter connection. insert a capacitor between this pin and the comin pin (pin 4). 4 comin spindle motor position detector comparator differential input. insert a capacitor between this pin and the fil pin (pin 3). 5, 6 64 sgnd tgnd small signal system ground 7 vco vco oscillator connection. insert a capacitor between this pin and ground. the vco oscillator frequency follows the speed of the spindle motor. 63 61 60 2 1 vg v cc 62 600 3 4 600 6 k 12 k 6 k 7 500 v cc 500 continued on next page.
no.7812- 6 /14 l v8223t continued from preceding page. continued on next page. pin no. pin name pin description equivalent circuit 8 rmax vco maximum frequency setting. insert a resistor between this pin and ground. reducing the value of that resistor increases the maximum vco frequency. v cc 500 8 9 vcoin vco control voltage input. insert a capacitor between this pin and ground. a control output proportional to the motor speed is generated by ic internal logic, and this is used to charge and discharge the capacitor. the voltage on this pin controls the vco oscillator frequency. 9 v cc 1 k 14 brk spindle block brake function control. a low-level input to this pin switches the ic to reverse torque brake mode. 44 45 46 s1 s2 s3 sled block logic inputs 19 26 27 vs3 vs2 vs1 h bridge circuit power supply. insert capacitors between these pins and ground. 22 23 30 pgnd3 pgnd2 pgnd1 h bridge output block ground connections 20, 21 25, 24 28, 29 out3f/r out2f/r out1f/r h bridge circuit forward/reverse outputs. connect these pins to the motor coils. 10 k v cc 100 k 26 19 27 23 22 30 25 20 28 24 21 29
no.7812- 7 /14 l v8223t continued from preceding page. pin no. pin name pin description equivalent circuit 10 mode1 spindle block pwm frequency switching. the clk pin (pin 16) and pwm pin (pin 15) input frequencies have the relationship shown below. when a high level is input: fpwm = fclk/32 when a low level is input: fpwm = fclk/64 11 s/s spindle motor block start/stop control. the circuit operates in start mode when a high level is input. 12 mute3 half bridge circuit muting control. the output pin (out4) goes to the high-impedance state (muted state) when a low level is input. 13 in4 half bridge circuit control input 15 pwm spindle block pwm signal input. the output transistor is turned on when a high level is input to this pin. 16 clk reference clock input used for logic operations. input a spindle pwm signal with a frequency 32 or 64 times the frequency of this signal. 17, 18 31, 32 33, 34 in3f/r in1f/r in2f/r actuator h bridge block logic inputs 35 mute h bridge 1 and 2, and 3 phase sled muting control. the out1r/f, out2r/f, suo, svo, and swo pins go to the high-impedance state (muted state) when a low level is input to this pin. 36 mute2 h bridge 3 muting control. the out3r/f pin goes to the high-impedance state (muted state) when a low level is input to this pin. 37 cp1 charge pump step-up pulse output. insert a capacitor between this pin and the cpc1 pin (pin 39). leave this pin open if a voltage stepped up by a factor of 2 is to be used. 38 cp2 charge pump step-up pulse output. insert a capacitor between this pin and the cpc2 pin (pin 40). 39 cpc1 charge pump step-up connection. insert a capacitor between this pin and the cp1 pin (pin 37). 40 cpc2 charge pump step-up connection. insert a capacitor between this pin and the cp2 pin (pin 38). 41 vg charge pump step-up output. insert a capacitor between this pin and ground. 42, 43 v cc power supply used for the small signal system. insert a capacitor between these pins and ground. 10 k v cc 100 k v cc 37 38 v cc 41 39 40 continued from preceding page.
no.7812- 8 /14 l v8223t continued from preceding page. pin no. pin name pin description equivalent circuit 48 fg spindle fg pulse signal output. this pin outputs a signal equivalent to the signal provided when 3 hall sensors are used. 50 suco sled block suo output phase position detector comparator output 53 svco sled block svo output phase position detector comparator output 54 swco sled block swo output phase position detector comparator output 49 slgnd sled output block ground 47 slvs sled motor drive power supply. insert a capacitor between this pin and ground 51 52 55 suo svo swo outputs. connect these pins to the sled motor coils. 59 scom sled motor common point connection v cc 55 52 51 47 49 59 vg 1 k 1 k v cc 56 out4 half bridge output. connect this pin to the motor coil. 57 vs4 half bridge power supply. insert a capacitor between this pin and ground. 58 pgnd4 half bridge output block ground 56 58 57
no.7812- 9 /14 l v8223t block diagram pre drive out3f out3r slgnd vs3 logic in3f in3r pre drive out2f logic in2f in2r pre drive out1f out1r logic in1f in1r mute pre drive logic swo svo suo slvs out2r s3 s2 s1 vs4 pre drive in4 LV8223T waveform distributor waveform synthesizer waveform synthesizer scom swco svco suco logic pgnd1 vs1 pgnd2 vs2 pgnd3 + + from dsp + + vs1 vs2 vs3 mute mute2 mute3 + + from dsp v cc to dsp vs4 vco vcoin phase comparator 1/ n vco rmax pgnd4 out4 rmi n cpc1 cp2 cpc2 clk charge pump cp1 fil spgnd wout vout uout spvs comin com v cc sel osc pre drive vg pwm fg s/s brk mode gnd spvs pwmin + commutation logic
no.7812- 10 /14 l v8223t sample application circuit vg 4 9 10 11 12 6 7 8 5 2 3 13 14 15 16 1 20 17 18 19 21 22 23 24 25 26 27 28 29 30 31 32 33 35 34 36 38 37 39 in3r LV8223T spvs fil sgnd sgnd vco rmax vcoin mode1 s/s mute3 in4 brk clk pwm in3f vs3 out3f out3r pgnd3 pgnd2 out2r out2f vs2 pgnd1 out1r out1f vs1 in1r in1f in2r in2f mute mute2 cp1 cp2 cpc1 cpc2 spgnd v cc v cc s1 s3 slvs fg slgnd suco suo svo svco swco swo out4 vs4 pgnd4 scom wout vout com uout tgnd comin 40 41 42 43 44 45 46 s2 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 0.0022 f 0.0033 f 0.47 f 56 k 0.22 f 0.22 f 0.22 f * capacitors must be inserted between each vs and pgnd pair, and between each v cc and sgnd pair.
no.7812- 11 /14 l v8223t LV8223T functional description and notes on external components the LV8223T is a system driver ic that implements, in a single chip, all the motor driver circuits required for cd and md players. since the LV8223T provides a spindle motor driver, a three-phase sled stepping motor driver, three h bridge drivers for the focus, tracking, and head up/down actuators, and a single half bridge motor driver channel, it can contribute to thinner form factors and further miniaturization in end products. since the spindle motor driver uses a direct pwm sensorless drive technique, it achieves high-efficiency motor drive with a minimal number of external components. read the following notes before designing driver circuits using the LV8223T to design a system with fully satisfactory characteristics. output drive circuit and speed control methods the LV8223T adopts the synchronous commutation direct pwm drive method to minimize power loss in the output circuits. low on-resistance dmos devices (total high and low side on-resistance: 0.8 , typical) are used as the output transistors. the spindle motor driver speed is controlled by brk and pwm signals provided by an external dsp. the pwm signal controls the sink side transistor. that transistor is switched according to the input duty of the signal input to the pwm pin (pin 15) to control the motor speed. (the sink side transistor is on when the pwm input is high, and off when the pwm input is low.) soft switching circuit this ic uses variable duty soft switching to minimize motor drive noise. an excitation current on/off dual-sided soft switching technique is used for this soft switching. note that the LV8223T does not use soft switching drive, but instead uses hard switching drive, if it is not supplied with a clk signal from the dsp. in this operating mode, the clk signal is provided by an internal oscillator circuit. vco circuit constants the LV8223T spindle block adopts a sensorless drive technique. sensorless drive is implemented by detecting the back emf signal generated by the motor and setting the commutation timing accordingly. thus the timing control uses the vco signal. we recommend using the following procedure to determine the values of the vco circuits external components. 1. connect components with provisional values. connect a 2.2 f capacitor between the vcoin pin (pin 9) and ground, connect a 68 k resistor between the rmax pin (pin 8) and ground, and connect a 3300 pf capacitor between the vco pin (pin 7) and ground. 2. determine the value of the vco pin (pin 7) capacitor. select a value such that the startup time to the target speed is the shortest and such that the variations in startup time are minimized. if the value of this capacitor is too large, the variations in the startup time will be excessive, and if too small, the motor may fail to turn. since the optimal value of the vco pin constant differs with the motor characteristics and the startup current, the value of this component must be verified again if the motor used or any circuit specifications are changed. 3. determine the value of the rmax (pin 8) resistor. select a resistor value such that the vcoin pin voltage is about v cc C 1.0 v or lower with the motor operating at the target speed. if the value of this resistor is too large, the vcoin pin voltage may rise excessively. 4. determine the value of the vcoin pin (pin 9) capacitor. if the fg output (pin 48) pulse signal becomes unstable at the lowest motor speed that will be used, increase the value of the vcoin pin capacitor. 5. determine the value of the resistor connected between the vcoin pin (pin 9) and ground. when intermittent drive (free-running deceleration) using the s/s and mute pins is used to reduce system power consumption and the system locks up on restart, a large resistor (several m ) must be connected to discharge the capacitor connected to the vcoin pin. choose a value for this resistor such that the time for complete discharge is longer than the motor free-running deceleration time. note that if an oscilloscope probe is attached to the vcoin pin when determining the value of this constant, the discharge characteristics will differ due to the probe impedance. this issue requires care when testing in an actual system. (we recommend using an fet probe.) (reason that a discharge resistor is required when the locked state occurs: since the commutation timing in sensorless drive is determined by detecting the back emf signal generated by the motor, the timing and other aspects are controlled based on the vco signal. therefore, the vco control voltage is generated according to the speed of
no.7812- 12 /14 l v8223t the spindle motor. when a voltage independent of the spindle motor speed is applied to the vcoin pin, the commutation timing will be disrupted and startup and drive operation will be adversely affected.) s/s and mute circuits the s/s pin (pin 11) functions as the spindle motor driver start/stop pin; a high-level input specifies operation in the start state. the mute, mute2, and mute3 pins (pins 35, 36, and 12) control the drivers other than the spindle block; a low-level input to these pins applies muting to the corresponding block or blocks. when a low level is applied, the corresponding drivers (the h bridge blocks and the three-phase sled block) go to the high-impedance state for all outputs, regardless of the logic inputs. (the mute pin mutes the h bridge 1 and 2 blocks and the three-phase sled block, the mute2 pin mutes the h bridge 3 block, and the mute3 pin mutes the half bridge block.) since the s/s, mute, mute2, and mute3 pins operate independently, all of the s/s, mute, mute2, and mute3 pins must be set to the low level to set the ic to full standby mode (power saving mode). braking circuit the brk pin (pin 14) switches the direction of the torque applied by the spindle motor driver; when a low level is applied to the brk pin, the driver switches to reverse torque braking mode. when the motor decelerates to an adequately low speed in reverse torque braking mode, the driver switches to short-circuit braking mode to stop the motor. (note: the ic cannot be set to low-power mode at this time.) note that when stopping the motor with the braking function, if this circuit switches to short-circuit braking too quickly and problems such as the motor remaining in motion occur, the value of the resistor connected to the rmax pin (pin 8) must be reduced. if the motor moves back and forth without stopping and the ic does not switch to short-circuit braking when the speed approaches zero, insert a resistor with a value of a few k at the com pin. (caution: verify that insertion of this resistor does not degrade the startup characteristics.) notes on the clk and pwm signals the LV8223T clk pin (pin 16) is used as the sensorless logic reference clock, for step-up circuit pulse generation, and for other purposes. therefore, if the clk signal is supplied from the dsp, it must always be input in start mode. the clk input signal must have a frequency that is either 32 to 64 times that of the pwm input signal. the mode1 pin (pin 10) selects the relationship between the clk and pwm frequencies. if the clk signal is 32 times the pwm signal, the mode1 pin must be set high, and if the clk signal is 64 times the pwm signal, the mode1 pin must be set low. we recommend that the clk input frequency be less than 10 mhz. as was mentioned previously in the section on soft switching, if the clk signal is not supplied by the dsp (the clk pin is left open or is shorted to ground), the internal oscillator circuit operates and supplies the clk signal. since the clk signal and the pwm signal will be asynchronous in this case, the spindle motor drive operation will not be soft switching drive, but will be hard switching drive. fg output circuit the fg pin (pin 48) is the spindle block fg output. it outputs a pulse signal equivalent to a three hall sensor fg output. this output has an mos circuit structure. spindle block position detector comparator circuit the spindle block position detection comparator circuit is provided to detect the position of the rotor using the back emf generated when the motor turns. the ic determines the timing with which the output block applies current to the motor based on the position information acquired by this circuit. startup problems due to comparator input noise can be resolved by inserting a capacitor (about 1000 to 4700 pf) between the comin pin (pin 4) and the fil pin (pin 3). note that if this capacitor is too large, the output commutation timing may be delayed at higher speeds and efficiency may be reduced. charge pump circuit the LV8223T n-channel dmos output structure allows it to provide a charge pump based voltage step-up circuit. a voltage 3 times the v cc voltage (or about 6.5 v) can be acquired by inserting a capacitor (recommended value: 0.22 f or larger) between the cp2 and cpc2 pins. we recommend using this circuit with values such that the voltage relationship between the stepped-up voltage (vg) and the motor supply voltage (vs) is vg C vs 3 3.0 v. note that this circuit is designed so that the stepped-up voltage (vg) is clamped at about 6.5 vdc. a larger capacitor must be used on the vg pin if the ripple on the stepped-up voltage (vg) results in vgmax exceeding 6.8 v. observe the following points if the vg voltage is supplied from external circuits. ? the vg voltage supplied from the external circuits must not exceed the absolute maximum rating vgmax. ? the capacitor between the cp and cpc pins (pin 37 and 40) is not required.
no.7812- 13 /14 l v8223t ? the vg voltage must be applied in the correct order. the vg voltage must be applied after the v cc level is applied, and must be cut before the v cc power supply is turned off. ? there is an ic-internal diode between the v cc and vg pins. therefore, supply voltages such that v cc > vg must never be applied to this ic. three-phase sled driver circuit this circuit is used as the sled motor driver circuit. the suc0 to swc0 pins (pin 50, 53, and 54) are the sled driver position detector comparator output pins. they have an mos output structure. these pins are used to feed back the sled motor speed and position information to the dsp or microcontroller. the s1 to s3 pins (pins 44, 45, and 46) are the sled driver logic inputs, and are connected to the dsp. these pins have built-in pull-up resistors. actuator block the LV8223T provides three h bridge channels for use as focus and tracking actuator drivers. the actuator block logic input pins have built-in pull-down resistors. pwm is used for control, and the block supports synchronous commutation. notes on pcb pattern design the LV8223T is a system driver ic implemented in a bi-dmos process; the ic chip includes bipolar circuits, mos logic circuits, and mos drive circuits integrated on the same chip. as a result, extreme care is required with respect to the pattern layout when designing application circuits. ? ground and v cc /vs wiring layout the LV8223T ground and power supply pins are classified as follows. small-signal system ground pins ? sgnd (pins 5 and 6), tgnd (pin 64) large-signal system ground pins ? spgnd (pin 1), pgnd1 (pin 27), pgnd2 (pin 23), pgnd3 (pin 22), slgnd (pin 49) small-signal system power supply pins ? v cc (pins 42 and 43) large-signal system power supply pins ? spvs (pin 2), slvs (pin 47), vs1 (pin 30), vs2 (pin 26), vs3 (pin 19), vs4 (pin 57) capacitors must be inserted, as close as possible to the ic, between each of the small-signal system power supply pins (pins 42 and 43) and the ground pins (pins 5 and 6). the large-signal system ground pins (the pgnd system) must be connected with the shortest possible lines, and furthermore in a manner such that there is no shared impedance with the small-signal system ground lines. capacitors must also be inserted, as close as possible to the ic, between the large-signal system power supply (vs system) pins and the large-signal system ground pins. ? positioning the small-signal system external components the small-signal system external components that are connected to ground must be connected to the small-signal system ground with lines that are as short as possible.
ps no.7812- 14 /14 l v8223t specifications of any and all sanyo products described or contained herein stipu late the performance , characteristics, and functions of the described products in the independent stat e, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's p roducts or equipment. sanyo electric co., ltd. strives to supply high-quality high-reliability product s. however, any and al l semiconductor products fail with some probability. it is possible that these pro babilistic failures coul d give rise to accidents or events that could endanger human lives, that could giv e rise to smoke or fire, or that could cause damage to other property. when designing equipment, adopt sa fety measures s o t hat these kinds of accidents or events cannot occur. such measures include but a re not limited to protectiv e circuits and error prevention circuits for safe design, redundant design, and st ructural design. in the event that any or all sanyo products(including technical data,services) d escribed o r contained herein are controlled under any of applicable local export control law s and regulations, such products m ust not be e xpor ted without obtaining the e xpor t license from the author ities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by a ny means, electronic o r mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of sanyo electric co. , ltd. any and all information described or contained herein are subject to change with out notice due to product/technology improvement, etc. when designing equipment, refer to the "del ivery specification " for the sanyo product that you intend to use. information (including circuit diagrams and circuit parameters) herein is for ex ample only ; it is not guaranteed for volume production. sanyo believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of inte llectual property rights or other rights of third parties. this catalog provides information as of may, 2004. specifications and information herein are subject to change without notice.

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